Setting up GPIO on the r/pi | CS 140E
Appreciation
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Importance
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Date Added
1.13.26
TLDR
“This note describes how to configure and use the r/pi GPIO pins.”
2 Cents
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Tags
- BCM2835 = the system-on-chip on early Raspberry Pi: CPU + GPU + peripherals (external hardware devices for e.g., I/O)
- Hardware is controlled via MMIO (memory-mapped I/O)
- Hardware registers exposed as memory addresses, where writing to an address → hardware action
- Broadcom docs list GPU bus addresses (0x7E…), whereas ARM CPU sees peripherals at 0x20…
Note: such ad hoc, "you just have to know" factoids are wildly common when dealing with hardware, which is why this is a lab class.
- GPIO register model
- GPFSELx (function select) controls whether each pin is input/output/alternative func. 3 bits per pin and requires read–modify–write because multiple pins share a register.
- GPSETx / GPCLRx (set / clear). Writing a 1 to bit N sets or clears GPIO pin N. Write-only action registers with no stored state (think of as buttons!).
- Bit manipulation
- |= → set bits
- &= → clear bits
- ~mask → invert mask
- For GPSET/GPCLR: bit N controls pin N →
1 << pin - For GPFSEL: 3 bits per pin → shift by 3 * pin (within that register)